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Applications Engineer (ASIC SOC) more...
Location:Folsom, CA
First posted:July 06, 2020 (last updated 3 weeks 4 days ago)

Job Description and Requirements:
Staff ASIC / IP Applications Engineer

Are you a seasoned ASIC or SOC lead or designer that enjoys working with customers?  

Are you interested in working across various market segments (AI, Cloud, Networking, Storage...), designs, foundries and processes ranging from 5nm (and below) to 28nm (and above)? To develop solutions for customer's chip designs using the Synopsys IP portfolio. It is perfect for someone who has ASIC/SoC design experience and great interpersonal skills and is committed to the success of our customers.

We're looking for an IP Customer Applications Engineer to join the team.

In this role you would be collaborating with the sales & marketing team to identify and understand our customers' technical & business challenges and develop appropriate strategies & solutions for customers, leveraging the broad Synopsys IP portfolio. You would be educating our customers on how our IP products meet their needs and helping them evaluate it (with support from the product R&D teams) relative to their requirements along with influencing the IP product development roadmap by communicating customer needs to the product R&D teams. You would also be Supporting the engagements via the eventual on-site or remote technical interactions, providing demos, supporting evaluations, resolving technical problems, addressing competitive challenges, and regularly communicating status during the engagements.

Key Qualifications

  • BSEE with 10+ years of relevant experience, or MSEE with 7+ years of relevant experience
  • Good understanding of latest SoC architectures and system-level design practices for one or more market segments (mobile, storage, automotive, networking, IoT) particularly from IP requirements perspective
  • Familiarity with state-of-art SoC design implementation
  • RTL design and verification using Verilog or SystemVerilog
  • Synthesis and static timing analysis, physical design flow, testbench creation and simulation, some familiarity with analog/mixed-signal design and verification flows, and basic understanding of package and PCB design flows and technologies
  • Travel (~ 15%) required to visit customer, sales, and engineering locations
  • Ability to understand and present complex technical requirements, problems, and solutions concisely in verbal and written communications
  • Ability to analyze, summarize and generate status updates from technical data
  • Ability to organize, conduct and co-ordinate meetings involving multiple teams internal and external
  • Prior experience or technical familiarity with interface and connectivity protocols, e.g. SerDes, PCIe, DDR, USB, MIPI, Ethernet.
  • Prior experience in selecting, using, designing, or supporting internal or external IP
  • Prior experience in an application engineering or another direct customer facing role

At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.


Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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United States

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